1. Field of the Invention
The present invention relates to a semiconductor memory, and more particularly, to a semiconductor memory having a plurality of memory cell areas called banks.
2. Description of the Related Art
Recently, a synchronous dynamic random access memory (SDRAM) has been provided and used for a computer system, and the like. Further, a SDRAM having a plurality of banks (for example, two banks, four banks, or eight banks) has been studied and also provided. Note that the banks are maintained in an active state if required even under an unselected state.
For example, in the SDRAM having two banks, when one bank carries out an active operation, the other bank simultaneously carries out a precharge operation, so that the total operation speed becomes high. Further, for example, the SDRAM having a plurality of banks is used for a cache memory of a computer system, so as to accelerate the cache operation thereof.
Note that, among computer systems, some are designed to use four-bank SDRAMs and some are designed to use two-bank SDRAMs. In these four-bank and two-bank SDRAMs used as the cache memory of the computer system, the configuration of the SDRAM, i.e., the number of the banks, is determined in accordance with the requirement of the computer system, or the configuration of the computer system using the SDRAM.
Nevertheless, in the prior art SDRAM having a plurality of banks, for example, the four-bank SDRAM of the prior art is incompatible with the two-bank SDRAM, so that it is not applicable to the computer systems that operate with two-bank SDRAMs. This problem of the prior art SDRAM will be explained in detail with reference to the accompanying drawing.